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Design Verification Engineer
ThunderSoft
Posted
last month

Penang, Malaysia

Onsite

MYR 8K

Mid Level

Full Time

Job Categories

Engineering IT Design Verification Consulting

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Sema Summary

The Design Verification Engineer will apply functional verification techniques to enhance pre-silicon verification quality. The role involves independent work on DV tasks and providing technical guidance to the team.

About Company

ThunderSoft is a provider of operating system technologies and solutions, specializing in mobile, IoT, automotive, and enterprise sectors. Founded in 2008, the company has a global presence and collaborates with major tech firms.

Core Requirements

Bachelor's or Master's in Electrical Engineering or Microelectronics.
4+ years of experience with UVM.
Strong coding skills in Verilog and SystemVerilog.
Good understanding of ASIC/SOC design flow.
Experience with C/C++ and scripting languages.

Responsibilities

Apply functional verification techniques for ASIC/SOC design.
Work independently on various DV tasks.
Provide technical guidance to the DV team.
Create and implement block and chip level test plans.
Conduct USB-IF compliance testing.
Perform coverage analysis and regression cleanup.
Involve in the porting/creation of the DV environment.

Must Have skills

UVMVerilogSystemVerilogC/C++Scripting languagesAnalytical skillsProblem-solving skills

Job Keywords

Design VerificationUVMASICSOCFunctional Verification

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